Ingeniería Electrónica
Diseño e implementación de una arquitectura embebida para GEMM aplicada a BETO/BERT en el SoM KV260
This work compares two methods for implementing and validating a GEMM (General Matrix Multiply, a core linear algebra operation consisting of the multiplication of two matrices with optional scaling and addition of a third) block for the Q, K, and V input projections, connected to supporting blocks. The GEMM is defined based on the architectural parameters of the BETO/BERT cased language model (Bidirectional Encoder Representations from Transformers, a transformer-based model that learns contextual text representations by processing sequences bidirectionally; BETO is its adapted, pre-trained version for Spanish, including both lowercase and uppercase characters), and is ultimately deployed on the KV260 FPGA. Three tools are employed. The first is Vitis HLS, which, using code based on algorithmic processing and block-partitioning logic, implements the matrix multiplication in C++. It then synthesizes and exports the modules in Verilog to the second tool, Vivado ML. This tool receives them and, using a block-architecture approach for the data flow of the Q, K, and V projection layers, synthesizes the RTL. The hardware bitstream is exported, and finally, Vitis IDE is used to create a bare-metal program to perform validation and measure timing and power consumption per projection, as well as total power, on the FPGA. Validation consists of comparing the weights generated from three texts of equal sequence length, previously extracted (using PyTorch) from the first projection layer performed in the encoder via the GEMM. The second method is a co-design approach, creating the IP repository and the top module directly in SystemVerilog within Vivado, followed by the same validation process. The results are compared and show similar performance: 45 ms and 36 ms of execution time per projection, and 1.68 GFLOPS and 2.05 GFLOPS, respectively, for each method, with no checksum or mismatch errors—which validates the correct operation of the GEMM. Regarding power consumption, the first method draws 3.3 W, while the second increases this value by only approximately 70 mW. Total resource utilization is 9.58% for the first method and 19.54% for the second. Therefore, the main contribution is the code created for each respective language, which enabled the generation of these results. Due to the constraints and scoping of this work, a direct comparison with other literature is not feasible; however, the results do provide a foundation for further development that could eventually enable such a comparison.